Semiconductor devices are used by being packaged on a semiconductor package substrate. Semiconductor package substrates used for packaging have fine circuit patterns and/or I/O terminals. As high performance and/or high integration of a semiconductor device and miniaturization and/or high performance of an electronic apparatus using a semiconductor progress, a line width in a fine circuit pattern of a semiconductor package substrate further decreases and complexity thereof increases as well.
In the manufacture of an existing semiconductor package substrate, a through-hole is formed by using a copper clad laminate (CCL) in which copper foil is coated on an insulating material, and an inner surface of the through-hole is plated with gold to electrically connect an upper surface of copper foil and a lower surface of copper foil. Then, each of the upper surface of copper foil and the lower surface of copper foil is patterned using a photoresist to manufacture the semiconductor package substrate. However, the above conventional semiconductor package substrate manufacturing method may be complicated and have low accuracy.